Design and Analysis of Low Power 10- Transistor Full Adders Using Novel X-nor Gates
نویسندگان
چکیده
Full adders are important components in applications such as digital signal processors (DSP) architectures and micro-processors. In this paper, we propose a technique to build a total of 3 low power 10 transistor full adder using x-nor gates. We have done around 10 simulation runs of each adder for different frequencies, load capacitance and input patterns. Almost all the new adders consume less power in high frequencies. Out of 3 adders last two adders consume less power as compared to first one. The power consumption is compared against the Static Energy Recovery Full-adder(SERF). One drawback of new adders is the threshold-voltage loss of pass transistors. Index Terms – Arithmetic circuit, full adder, low power, XNOR.
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